Tuesday, November 20, 2007

Cash in Hand, AMD Targets Intel

From PC World

With Advanced Micro Devices on thin ice with severe pressure from chip rival Intel and four consecutive quarterly net losses, the cash infusion by an Abu Dhabi government investment arm could help the struggling chip maker remain competitive.

Mubadala Development Company, in Abu Dhabi, United Arab Emirates, paid US$622 million to acquire an 8.1 percent stake in AMD on Friday. Mubadala Development is owned by the Abu Dhabi government.

AMD will invest the money in a long-term strategy for research and development, products and manufacturing, said Drew Prairie, a spokesman for AMD. The money may be used toward the development of "Fusion," which will integrate a GPU (graphics processing unit) and CPU on a single die. Fusion is expected to be delivered by late 2008 or early 2009.

The deal should help AMD be competitive with Intel by providing the cash to develop new chip technologies, said Richard Doherty, research director at The Envisioneering Group. AMD needed the money to invest in fabs, research and development, and talent to develop new chip architectures, he said.

AMD is currently developing processors at 65 nanometers and losing processor market share to Intel, which this week released the power-efficient 45-nanometer Penryn chip. Intel is also investing heavily to open new fabs to manufacture 45-nm chips, so AMD needs to invest in R&D and quickly develop its future chip architectures to keep up with Intel, Doherty said.

Doug Freedman, an analyst with American Technology Research, agreed. "The 65-nm node has not been smooth sailing for the company. Investors are more focused on the 45-nm node," Freedman said.

AMD next week is expected to launch the "Spider" platform, which includes the next-generation 65-nm quad-core Phenom processor that will better support graphics cards to deliver high-quality graphics to PCs. In a financial earnings call last month, AMD said it would jump to the 45-nm chip manufacturing process by mid-2008.

"If AMD can keep its innovation gear train moving, they can give Intel a good run for its money," Doherty said. He has high hopes for AMD's ability to continue to be competitive. Demand for PCs should remain high and there will be space for all three x86 competitors -- Intel, AMD and Via -- to operate in the market, he said.

The investment also has analysts speculating that AMD could build a fab in the Middle East in the next five years, Doherty said. AMD competitor Intel has a presence in the Middle East, with a chip plant in Israel.

In addition, because Mubadala invests in education, the AMD deal could ultimately empower technology education in the Middle East, Freedman and others said.

Mubadala's investment in AMD is independent and not related to any specific initiative, said Richard Mintz, a Mubadala spokesman in Washington, D.C.

Mubadala will remain independent of AMD's operations and didn't ask for a spot on the company's board, Mintz said. Mubadala felt AMD's management team was strong and acquiring a minority stake would result in a long-term return, he said.

Mubadala, which invests in a wide variety of industries, could be looking at gaining relationships in the technology industry, Freedman said. The investment in AMD is consistent with Mubadala's strategy as a long-term investor, he said.

Saturday, November 17, 2007

AMD could bite Intel with cash infusion

From www.computerworld.com

With Advanced Micro Devices on thin ice with severe pressure from chip rival Intel and four consecutive quarterly net losses, the cash infusion by an Abu Dhabi government investment arm could help the struggling chip maker remain competitive.

Mubadala Development Company, in Abu Dhabi, United Arab Emirates, paid US$622 million to acquire an 8.1 percent stake in AMD on Friday. Mubadala Development is owned by the Abu Dhabi government.

AMD will invest the money in a long-term strategy for research and development, products and manufacturing, said Drew Prairie, a spokesman for AMD. The money may be used toward the development of "Fusion," which will integrate a GPU (graphics processing unit) and CPU on a single die. Fusion is expected to be delivered by late 2008 or early 2009.

The deal should help AMD be competitive with Intel by providing the cash to develop new chip technologies, said Richard Doherty, research director at The Envisioneering Group. AMD needed the money to invest in fabs, research and development, and talent to develop new chip architectures, he said.

AMD is currently developing processors at 65 nanometers and losing processor market share to Intel, which this week released the power-efficient 45-nanometer Penryn chip. Intel is also investing heavily to open new fabs to manufacture 45-nm chips, so AMD needs to invest in R&D and quickly develop its future chip architectures to keep up with Intel, Doherty said.

Doug Freedman, an analyst with American Technology Research, agreed. "The 65-nm node has not been smooth sailing for the company. Investors are more focused on the 45-nm node," Freedman said.

AMD next week is expected to launch the "Spider" platform, which includes the next-generation 65-nm quad-core Phenom processor that will better support graphics cards to deliver high-quality graphics to PCs. In a financial earnings call last month, AMD said it would jump to the 45-nm chip manufacturing process by mid-2008.

"If AMD can keep its innovation gear train moving, they can give Intel a good run for its money," Doherty said. He has high hopes for AMD's ability to continue to be competitive. Demand for PCs should remain high and there will be space for all three x86 competitors -- Intel, AMD and Via -- to operate in the market, he said.

The investment also has analysts speculating that AMD could build a fab in the Middle East in the next five years, Doherty said. AMD competitor Intel has a presence in the Middle East, with a chip plant in Israel.

In addition, because Mubadala invests in education, the AMD deal could ultimately empower technology education in the Middle East, Freedman and others said.

Mubadala's investment in AMD is independent and not related to any specific initiative, said Richard Mintz, a Mubadala spokesman in Washington, D.C.

Mubadala will remain independent of AMD's operations and didn't ask for a spot on the company's board, Mintz said. Mubadala felt AMD's management team was strong and acquiring a minority stake would result in a long-term return, he said.

Mubadala, which invests in a wide variety of industries, could be looking at gaining relationships in the technology industry, Freedman said. The investment in AMD is consistent with Mubadala's strategy as a long-term investor, he said.

Tuesday, November 13, 2007

Intel Ships Power-Efficient Penryn CPUs

from the PC WORLD

HP, Lenovo and others are preparing systems with the new faster, greener chips


Intel on Sunday launched its long-awaited new line of power-efficient microprocessors, code-named Penryn, designed to deliver better graphics and application performance as well as virtualization capabilities.

Intel has teamed up with 40 original equipment manufacturers to deliver Penryn-based Xeon and Core 2 processors. Vendors including Hewlett-Packard and Lenovo have already announced business desktops with Penryn-based quad-core Xeon 5400 processors, with more server announcements scheduled to come soon. (PC World has already reviewed several new Penryn systems, including CyberPower's new gaming system, the Power Infinity Pro.)

New Process Cuts Power

The processors, manufactured using a 45-nanometer process, feature smaller transistors and cut down on electricity leaks, which makes them faster and more power efficient than earlier 65-nm processors, said Stephen Smith, director for Intel's digital enterprise group operations.

The most power-hungry Penryn-based systems will consume no more than 120 watts. Penryn-based notebooks that are due in the first quarter of 2008 will use 25 watts, Smith said. Today's 65-nm notebooks consume 35 watts of power, Smith said.

While cutting down on power usage, Penryn processors jump to higher clock rates and feature cache and design improvements that improve the processors' performance compared with earlier 65-nm processors, Smith said.

The processors deliver a 40 percent to 60 percent improvement in video and imaging performance, Smith said. New instructions on the processor speed up photo manipulation and encoding of high-definition video, Smith said.

Intel's Penryn processor for gaming systems, the 45-nm Intel Core 2 Extreme QX9650 quad-core processor, takes advantage of the instructions and includes a larger cache to deliver better graphics and video performance, Smith said.

Hardware enhancements allow virtual machines to load up to 75 percent faster, Smith said.

Corporate Change

The Penryn launch signals a new era in the way Intel manufactures chips, Smith said. The processors are the first to use high-k metal-gate transistors, which make the processors faster and less leaky compared with earlier processors that have silicon gates, Smith said. The processor is lead free, and by the second half of 2008, Intel will produce chips that are halogen free, making them more environmentally friendly, Smith said.

Intel will ship 12 new quad-core Intel Xeon 5400 server chips in November with clock speeds ranging from 2GHz to 3.20GHz, with a 12MB cache. In December, it will ship three dual-core Xeon 5200 server chips with clock speeds of up to 3.40GHz and a 6MB cache.

Intel will deliver the 45-nm Penryn processors in multiple phases, Smith said. In the first quarter of 2008, Intel will release the 45-nm Core 2 Quad processors and Core 2 Duo processors for desktops. In the same quarter, Intel will launch the Core 2 Extreme and Core 2 Duo processors for notebooks. Intel plans to release 45-nm processors for ultramobile PCs in 2008, though Smith couldn't provide an exact release date.

Penryn is a significant follow-up to the 65-nm Core 2 processor launched last year, said Dean McCarron, principal analyst at Mercury Research. A lot of business workstation users and gamers are interested in the improved media and system performance Penryn processors deliver, McCarron said.

Next: Nehalem

While the Penryn provides a small performance boost, it's not a major change in architecture, said Nathan Brookwood, an analyst at Insight 64. Rather than upgrading to Penryn systems, customers may wait for Nehalem, the next big overhaul in Intel's chip architecture that is scheduled for release in 2008, Brookwood said.

At the Intel Developer Forum in September, Intel CEO Paul Otellini demonstrated Nehalem, saying it would deliver better performance-per-watt and better system performance through its QuickPath Interconnect system architecture. Nehalem chips will also include an integrated memory controller and improved communication links between system components.

However, people who need to buy hardware now will invest in Penryn systems, Brookwood said. "It's not a massive upgrade cycle on notebooks and desktops," he said.

Pricing of the 45-nm Intel Xeon processors ranges from US$177 to $1,279 in quantities of 1,000, depending on the model, speeds, features and number ordered. The 45-nm Intel Core 2 Extreme QX9650 quad-core processor is priced at $999 in quantities of 1,000.

Thursday, October 18, 2007

Intel Rides Mobile Revenue to Strong Q3 Earnings

From E-Commerce News

Bolstered by a 20 percent increase in mobile product revenues, Intel (Nasdaq: INTC) The HP ProLiant DL380 G5 Server with Systems Insight Manager (SIM). Latest News about Intel late Tuesday issued a strong third-quarter earnings report that discussed record-level shipments of processors, chipsets and flash memory.

The Santa Clara, Calif., company's Q3 revenues came in at US$10.1 billion, a 15 percent increase on a yearly basis and a 16 percent uptick when compared with the second quarter. Intel reported operating income of $2.2 billion, net income of $1.9 billion and earnings per share of 31 cents.

Additionally, the veteran chipmaker announced gross margins of 52.4 percent for the quarter. Its Q2 gross margins were 46.9 percent and it said the operating income figure represents a 64 percent increase compared with the third quarter of 2006.

Future Looks Bright

"A combination of great products, strong and growing worldwide demand and operational efficiency from our ongoing restructuring efforts," are responsible for the company's performance, President and CEO Paul Otellini said. All signs point to continued growth in the fourth quarter, Otellini said, adding that he is pleased with the results and optimistic about the company.

Intel shipped more than 2 million quad-core processors during Q3 and now offers more than 20 quad-core processor designs, the company said. Company officials are also proud about their position in the server market.

"The biggest shift in the last six months certainly is our ability to participate very aggressively in servers," said Otellini. "The fact that we have record server unit numbers is a very good leading indicator of Intel back at its game across the board, I think. Servers have always been a very good business for us and I think we're outgrowing the industry right now."

Forays Into Mobility

The company credited its efforts to make moves in mobile device processing for being the primary driver of its quarterly growth in revenue. It experienced a 14 percent rate of growth for its Mobility and Digital Enterprise Group processors, while related chipsets and other products gained by 19 percent.

Intel predicts its increased production of 45-nanometer processors and its goal of providing chips for a larger variety of mobile devices will spur year-over-year revenue growth in the 30 percent range.

The company noted its presentations at the recent Intel Developer Forum (IDF), where it announced it will be introducing on Nov. 12 the world's first 45nm microprocessors, units based on its "breakthrough" 45nm Hi-k metal gate chip technology.

At IDF, Intel also demonstrated its second-generation 45nm "Nehalem" architecture, designed to go into production during the second half of 2008, and the production of test chips using the 32nm process technology, scheduled for 2009 production.

IDF was also the venue where Intel said its 2008 notebook platform, called "Montevina," will include 25-watt dual-core processors "that enable even thinner and lighter designs." A number of computer makers are planning to next year build Montevina-based notebooks capable of using WiMAX for Internet Over 800,000 High Quality Domains Available For Your Business. Click Here. access, Intel said. "Nokia announced plans to include Intel WiMAX silicon in its Internet tablet products, scheduled for 2008," added Intel.

Remaining Competitive

Intel shareholders have reason to be happy, particularly because Intel reacted aggressively to competition by designing new products, said Jack Gold, founder and principal analyst of J. Gold Associates.

"Intel is on a new product cycle uptick," Gold told the E-Commerce Times. "The industry is cyclical in a sense. You come up with new products, you ramp up, stay at the top for awhile. As products get little old, you fall. It's a typical business curve."

Intel during the past year "has been doing an awful lot of work getting new products to market and they are hitting now and people are taking notice," Gold said.

Additionally, basic capitalistic competitiveness plays a role, he added.

"Intel got a fire lit under its butt by AMD in the past two or three years," he said. "It was actually good for Intel. AMD right now is on the defensive.'

Tuesday, October 9, 2007

Tom and Jerry way: Frenemies forever

From The Economic Times

Often used to describe females who tangle with their female friends, it didn’t take long for the term to become part of our contemporary lexicon when the popular HBO series, Sex and the City put it out there in no uncertain terms. Well, we’ve known politics to make strange bedfellows, but it seems that even business is ready to make friends out of enemies.

Globally, whether its telecom, PC giants, media houses, banks, automobile industry or FMCGs, companies are fast learning to be friends with their competitors.

Examples are plenty. Without Intel - AMD wouldn’t exist - yet they are fierce competitors. Toyota is licensing its hybrid technology to it’s competitors in the auto industry.
Nestle sells countless food products to retail - yet competes with it through their Nespresso subsidiary (which sells coffee direct to consumers). Google, a business partner of WPP, competes with the latter in the advertising world. So what gives?

If both are partners and competitors at the same time, it cannot make for an easy relationship . More generally, frenemy also refers to two opposing parties, be it in personal relationships or in larg- scale interaction between nations, organisations , political parties, etc., that are mutually beneficial , yet are at odds to be mutually destructive.

Yet, in the world of business, the terms ‘frenemies’ and ‘coopertition’ , probably capture the real transition happening in the marketplace

Coopertition has been around in the Silicon Valley for a long time now and is the basis for huge developments in the software industry. Says Radhesh Balakrishnan, director, competitive strategy, Microsoft India: “Organisations can create more value for the customer if they come together at a certain level. Customers, today, are using heterogeneous environment. Making it all work together makes it necessary to interoperate.

For instance, Microsoft and Yahoo have made the IM services interoperable, which means that Yahoo users can directly interact with MSN users and vice-versa . However, we would still compete with Yahoo and love to see the number of MSN users grow.”
The frenemy mindset allows companies to come together to work on a specific development effort that helps speed up the whole process and capture value for certain technologies each has developed.

It also allows companies to use the benefits of wide ranging technology solutions while remaining focused on its core technological capabilities.

In fact, Stuart Read, marketing professor at IMD, Switzerland, points out another classic example of how companies cooperate yet compete.

Take Barco and Sony. Barco is into projection systems industry, buys tubes (components) from Sony to build its projectors - and also competes with Sony’s own finished projectors.

Competition to grab the largest market share doesn’t stop telecom giants like Airtel and Vodafone from proposing to share infrastructure or Coke and Pepsi to come together to lobby for their reputations in the pesticide crisis.

”The concept of frenemies or coopertition is becoming an increasingly pressing issue as business systems become more complex and as firms try to focus on only their core competence - outsourcing the rest of the business system to ‘partners’ (perhaps friend - perhaps foe) who have unique expertise. When taken together its easy to see when the environment gets more complex, and firms want to simplify their own role/position the natural outcome is that they have to collaborate with more organisations and some are inevitably competitive,” says Read.

It may be too early to say how encompassing the frenemy tactic will be for industry as a whole, but it’s imperatives are compelling enough.

The growth guru, Verne Harnish, founder & CEO, Gazelles, an outsourced corporate university for SMEs says, “The need for instant and continuous communication, and the power of globalisation, has driven competitors to create industry standards.

This has been an initial key driver for getting competitors to cooperate at the most basic level. For growth firms, they often need to partner with their large competitors, serving as subcontractors on various projects. The large competitor has the market clout; the small competitor has some special expertise.”

Though competition is largely irrelevant in early markets, the basic logic being there is no point competing over something that does not exist. The priority, therefore, is to create it and then argue who gets what.

“IBM and MS who collaborated heavily, 20 years back, to create the PC market, are today, competing with each other,” says Read. They now fall into the broad group of frenemies.

Just as the Internet helped make the nonsensical phrase ‘All your base are belong to us’ a well-recognised piece of the gen-Y lexicon, in a cluttered market segment aimed at an over-stimulated demographic, frenemy as a strategy just might work.

PC Mehra, professor sale and marketing, IMI (International Management Institute) says, “Companies are fighting for shelf space. There is a tough competition not only in product but also among various product categories.

For instance, if a consumer wants to spend a leisurely evening, he has the option of buying an expensive dress, going for a movie, eating at a nice restaurant. The need for collaboration among competitors arises to create the demand within your category. Once there is a demand, companies can compete for shelf space.”

This could mean transcending the flash and fizzle of what is considered traditional competition, which by no means is over.

And that could, after a little inward look.

“The reason companies often need to create external enemies is so they can provide their employees something to rally around - give them a reason to forget their internal challenges and focus on ‘beating someone’. It plays to the competitive juices that flow within people. It was like Nike declaring early on ‘we want to crush Adidas,” says Harnish.

But what will companies have to do to avoid waving the white flag? The answer boils down to balance, says Read. “In the Barco/Sony example - all Barco wants to assure is that it gets to compete with Sony’s projectors fairly.

That Sony components does not give an advantage to their own internal customer.”

Putting frenemy in charge of your strategy also means knowing your rivals really well. “One needs to listen to the customers and understand their demand to identify the ideal competitor to associate with. Also there is a need for an alignment of core values,” says Balakrishnan.

Mehra agrees, “Wavelengths have to match. If the other company doesn’t appreciate the ideas generated by your company, the whole exercise is a waste. There has to be maturity within the brand as well as the people working for it. Then only can the benefits of these alliances trickle down to the customers”.
The neat dividing lines of business are being erased and redrawn.

Dr. Neil Rackham, author of the classics SPIN Selling and Rethinking The Sales Force and a top sales researcher in the world and makes a key point - in the future all the real value gains will be between companies more than within companies i.e., all the action is at the boundaries between organisations.

This means that the way organisations work together is changing, significantly.

Sunday, October 7, 2007

The AMD, Intel Duel Moves Up The Scale To Quad-Core Stage

Advanced Micro Devices is joining an exclusive club, makers of quad-core chips.

On Monday, AMD (NYSE:AMD) AMD plans to roll out Barcelona, its first quad-core microprocessor, which will once again ratchet up its bitter battle with archrival Intel (NASDAQ:INTC) INTC.

But more than that, AMD is counting on Barcelona to lift its sales and move it back into the black.

Intel released its first quad core in November, joining the small group of quad-core chipmakers that also includes IBM (NYSE:IBM) IBM, Sun Microsystems (NASDAQ:JAVA) JAVA and Fujitsu. But those latter three make their multi-cores mostly for their own systems. Intel and AMD are focused on one another. And AMD touts Barcelona as a big technology leap over Intel.

"We believe it's the most advanced microprocessor on the market," said Randy Allen, the AMD vice president in charge of its server and workstation chip lines. "In terms of performance per watt, nothing today delivers as much."

Quad-core chips, as the name implies, have four cores, or what can be called four identical chip designs, on a single piece of silicon. This boosts performance over single- and dual-core chips but without any increase in power usage. This is critical for today's computers, which use so many applications that controlling power usage is crucial to keeping machines humming.

On Wednesday, Intel unveiled a line of quad-core chips for servers at a press event in San Francisco. Analysts say Intel's timing was in part to steal AMD's Barcelona thunder.

Quad-core customers, though, for the most part aren't choosing sides.

Among the server makers at the Intel event were IBM, Dell (NASDAQ:DELL) DELL, Hewlett-Packard (NYSE:HPQ) HPQ and Sun. All of them sell both Intel- and AMD-powered servers. Representatives of HP, IBM and Dell told IBD that their companies would be at Barcelona's launch event in San Francisco. AMD plans related events in Beijing and Barcelona.

American Technology Research analyst Douglas Freedman says AMD's Allen overstates the status of Barcelona, but it's a fine chip.

"I view Barcelona as evolutionary, not revolutionary," Freedman said.

He says it's sometimes better to be evolutionary. AMD's Opteron, the first dual-core chip, unveiled in 2003, was revolutionary, he says -- so much so that computer makers weren't ready for it.

That shouldn't happen with Barcelona, he says.

"(AMD's) ability to ramp good and exciting products is a lot better than it used to be," he said. Freedman has a buy rating on both Intel and AMD stocks.

AMD has a lot riding on Barcelona. AMD has lost money the past three quarters, a trend expected to continue in the next few quarters.

After several years of market share gains vs. Intel, AMD started losing share last year as Intel stepped up its product pace. AMD's share of total microprocessor sales has dipped into the upper-teens from nearly 25% early last year, analysts say. Its stock trades near 13, down from 27 a year ago.

Barcelona and the line Intel unveiled on Wednesday, the Xeon 7300, target network servers. One difference is that the Intel Xeon 7300 is strictly for servers and Barcelona is AMD's next big design advance. Other Barcelona chips will target PCs.

Allen says the first AMD quad-core chips will ship near year's end.

Barcelona has a couple of features that Intel can't yet match.

For one, its design is a "native" quad core. That is, AMD builds four identical cores onto a single piece of silicon. Intel puts two dual-core chip designs side by side on a chip, and connects them to form a quad core. AMD says its design performs better.

Intel has said it plans to release its own native quad-core design in the second half of 2008.

Another feature unique to AMD processors is an on-chip memory controller. Analysts say having the memory controller on the processor is faster than having the controller in a separate chip set, as Intel does it. Intel plans to put an on-chip memory controller on its devices starting in late 2008 or 2009.

Intel's new Xeon 7300 quad core, however, has a few advantages over AMD's Barcelona.

For one, Intel's had nine months to work the bugs out of the design, something AMD can't say. AMD had planned to roll out Barcelona last summer but was delayed when it ran into a design problem.

In addition, Intel will start using a more advanced manufacturing process by the end of this year.

Today, both use 65-nanometer designs. Intel will start using a 45-nm design later this year. The measurement refers to the width of the circuitry etching on the chip. The smaller the nanometer size, the higher the performance and the lower the cost of the chip.

Saturday, June 16, 2007

Intel

This generational and chronological list of Intel microprocessors attempts to present all of Intel's processors from the pioneering 4-bit 4004 (1971) to the present high-end offerings, the 64-bit Itanium 2 (2002) and Intel Core 2 and Xeon 5100 and 7100 series processors (2006). Concise technical data are given for each product.

Intel 4004: first single-chip microprocessor

MCS-4 Family:

  • 4004-CPU
  • 4001-ROM & 4Bit Port
  • 4002-RAM & 4Bit Port
  • 4003-10Bit Shift Registr
  • 4008-Memory+I/O Interface
  • 4009-Memory+I/O Interface

[edit] 4040

  • Introduced 4th Qtr, 1974
  • Clock speed of 500 kHz to 740 kHz using 4 to 5.185 MHz crystals
  • 0.06 MIPS
  • Bus Width 4 bits (multiplexed address/data due to limited pins)
  • PMOS
  • Number of Transistors 3,000 at 10 µm
  • Addressable Memory 640 bytes
  • Program Memory 8 KB
  • Interrupts
  • Enhanced version of 4004

MCS-40 Family:

  • 4040-CPU
  • 4101-1024-bit (256 x 4) Static RAM w/Separate I/O
  • 4201-4MHz Clock Generator
  • 4207/4209/4211-General Purpose Byte I/O Port
  • 4265-Programmable General Purpose I/O Device
  • 4269-Programmable Keyboard Display Device
  • 4289-Standard Memory Interface for MCS-4/40
  • 4308-8192-bit (1024 x 8) ROM w/ 4-bit I/O Ports
  • 4316-16384-bit (2048 x 8) Static ROM
  • 4702-2048-bit (256 x 8) EPROM
  • 4801-5.185 MHz Clock Generator Crystal for 4004/4201A or 4040/4201A

[edit] The 8-bit processors

[edit] 8008

  • Introduced April 1, 1972
  • Clock speed 500 kHz (8008-1: 800 kHz)
  • 0.05 MIPS
  • Bus Width 8 bits (multiplexed address/data due to limited pins)
  • PMOS
  • Number of Transistors 3,500 at 10 µm
  • Addressable memory 16 KB
  • Typical in dumb terminals, general calculators, bottling machines
  • Developed in tandem with 4004
  • Originally intended for use in the Datapoint 2200 terminal

[edit] 8080

[edit] 8085

  • Introduced March 1976
  • Clock speed 5 MHz
  • 0.37 MIPS
  • Bus Width 8 bits data, 16 bits address
  • Number of Transistors 6,500 at 3 µm
  • Assembly language downwards compatible with 8080.
  • Used in Toledo scale. Also was used as a computer peripheral controller - modems, harddisks, etc...
  • CMOS 80C85 in Mars Sojourner, Radio Shack Model 100 portable.
  • High level of integration, operating for the first time on a single 5 volt power supply, from 12 volts previously. Also featured two serial I/O connection,3 maskable interupts,1 Non-maskable,1 programmable,status,DMA.

MCS-85 Family:

  • 8085-CPU
  • 8155-RAM+ 3 I/O Ports+Timer
  • 8156-RAM+ 3 I/O Ports+Timer
  • 8185-SRAM
  • 8202-Dynamic RAM Controller
  • 8203-Dynamic RAM Controller
  • 8205-1 Of 8 Binary Decoder
  • 8206-Error Detection & Correction Unit
  • 8207-DRAM Controller
  • 8210-TTL To MOS Shifter & High Voltage Clock Driver
  • 8212-8 Bit I/O Port
  • 8216-4 Bit Paralell Bidirectional Bus Driver
  • 8218/8219-Bus Controller
  • 8222-Dynamic RAM Refresh Controller
  • 8226-4 Bit Paralell Bidirectional Bus Driver
  • 8231-Arithmetic Processing Unit
  • 8232-Floating Point Processor
  • 8237-DMA Controller
  • 8251-Communication Controller
  • 8253-Programmable Interval Timer
  • 8254-Programmable Interval Timer
  • 8255-Programmable Peripheral Interface
  • 8256-Multifunction Support Controller
  • 8257-DMA Controller
  • 8259-Programmable Interrupt Controller
  • 8271-Programmable Floppy Disk Controller
  • 8272-Single/Double Density Floppy Disk Controller
  • 8273-Programmable HDLC/SDLC Protocol Controller
  • 8274-Multi-Protocol Serial Controller
  • 8275-CRT Controller
  • 8276-Small System CRT Controller
  • 8278-Programmable KeyBoard Interface
  • 8279-KeyBoard/Display Controller
  • 8282-8-bit Non-Inverting Latch with Output Buffer
  • 8283-8-bit Inverting Latch with Output Buffer
  • 8291-GPIB Talker/Listener
  • 8292-GPIB Controller
  • 8293-GPIB Transceiver
  • 8294-Data Encryption/Decryption Unit+1 O/P Port
  • 8295-Dot Matrix Printer Controller
  • 8296-GPIB Transceiver
  • 8297-GPIB Transceiver
  • 8355-16,384-bit (2048 x 8) ROM with I/O
  • 8604-4096-bit (512 x 8) PROM
  • 8702-2K-bit (265 x 8 ) PROM
  • 8755-EPROM+2 I/O Ports

[edit] The bit-slice processor

[edit] 3000 Family

Introduced 3rd Qtr, 1974 Members of the family

  • 3001-Microcontrol Unit
  • 3002-2-bit Arithmetic Logic Unit slice
  • 3003-Look-ahead Carry Generator
  • 3205-High-Speed 6-bit Latch
  • 3207-Quad Bipolar-to-MOS Level Shifter and Driver
  • 3208-Hex Sense Amp and Latch for MOS Memories
  • 3210-TTL-to-MOS Level Shifter and High Voltage Clock Driver
  • 3211-ECL-to-MOS Level Shifter and High Voltage Clock Driver
  • 3212-Multimode Latch Buffer
  • 3214-Interrupt Control Unit
  • 3216/3226-Parallel,Inverting Bi-Directional Bus Driver
  • 3222-Refresh Controller for 4K NMOS DRAMs
  • 3232-Address Multiplexer and Refresh Counter for 4K DRAMs
  • 3235-Quad Bipolar-to-MOS Driver
  • 3242-Address Multiplexer and Refresh Counter for 16K DRAMs
  • 3245-Quad Bipolar TTL-to-MOS Level Shifter and Driver for 4K
  • 3246-Quad Bipolar ECL-to-MOS Level Shifter and Driver for 4K
  • 3404-High-Speed 6-bit Latch
  • 3408-Hex Sense Amp and Latch for MOS Memories

Bus Width 2-n bits data/address (depending on number of slices used)

[edit] Signal Processor

[edit] 2900 Family

  • 2910-PCM CODEC – µ LAW
  • 2911-PCM CODEC – A LAW
  • 2912-PCM Line Filters
  • 2920-Signal Processor

[edit] Digital Clocks Processor

[edit] 5000 Family

  • 5101-1024-bit (256 x 4) Static RAM
  • 5201/5202-LCD Decoder-Driver
  • 5204-Time Seconds/Date LCD Decoder-Driver
  • 5234-Quad CMOS-to-MOS Level Shifter and Driver for 4K NMOS RAMs
  • 5235-Quad CMOS TTL-to-MOS Level Shifter and Driver for 4K NMOS
  • 5244-Quad CCD Clock Driver
  • 5801-Low Power Oscillator-Divider
  • 5810-Single Chip LCD Time/Seconds/Date Watch Circuit

[edit] Old Memory

[edit] 1xxx Family

  • 1101-256-bit (256 x 1) Static RAM
  • 1402-1024-bit (256 x 4) Dynamic Shift Register
  • 1403-1024-bit (256 x 4) Dynamic Shift Register
  • 1404-1024-bit (256 x 4) Dynamic Shift Register
  • 1405-512-bit (512 x 1) Dynamic Recirculating Shift Register
  • 1406-200-bit (100 x 2) Dynamic Shift Register
  • 1407-200-bit (100 x 2) Dynamic Shift Register (20 Kohm output)
  • 1506-200-bit (100 x 2) Dynamic Shift Register
  • 1507-200-bit (100 x 2) Dynamic Shift Register (20 Kohm output)
  • 1602-2048-bit (256 x 8) Static PROM
  • 1702-2048-bit (256 x 8) Static PROM
  • S714-2048-bit (256 x 8) Static PROM

[edit] 2xxx Family

  • 2101-1024-bit (256 x 4) Static RAM w/Separate I/O
  • 2102-1024-bit (1024 x 1) Static RAM w/Separate I/O
  • 2104-4096-bit (4096 x 1) Dynamic RAM
  • 2105-1024-bit (1024 x 1) Dynamic RAM
  • 2107-4096-bit (4096 x 1) Dynamic RAM
  • 2108-8192-bit (8192 x 1) Dynamic RAM
  • 2109-8192-bit (8192 x 1) Dynamic RAM
  • 2111-1024-bit (256 x 4) Static RAM w/Common I/O
  • 2112-1024-bit (256 x 4) Static RAM w/Common I/O
  • 2114-4096-bit (1024 x 4) Static RAM w/Common I/O
  • 2115-1024-bit (1024 x 1) Static RAM
  • 2116-16,384-bit (16,384 x 1) Dynamic RAM
  • 2117-16,384-bit (16,384 x 1) Dynamic RAM
  • 2118-16,384-bit (16,384 x 1) Dynamic RAM
  • 2125-1024-bit (1024 x 1) Static RAM
  • 2141-4096-bit (4096 x 1) Static RAM w/Separate I/O
  • 2142-4096-bit (1024 x 4) Static RAM w/Common I/O
  • 2147-4096-bit (4096 x 1) Static RAM w/Separate I/O
  • 2148-4096-bit (1024 x 4) Static RAM w/Common I/O
  • 2149-4096-bit (1024 x 4) Static RAM w/Common I/O
  • 2308-8192-bit (1024 x 8) Static ROM
  • 2316-16,384-bit (2048 x 8) Static ROM
  • 2401-2048-bit (1024 x 2) Dynamic Recirculating Shift Register
  • 2405-2048-bit (1024 x 2) Dynamic Recirculating Shift Register
  • 2416-16384-bit (16384 x 1) CCD Memory
  • 2608-8192-bit (1024 x 8) PROM
  • 2616-16,384-bit (2048 x 8) Static PROM
  • 2704-4096-bit (512 x 8) EPROM
  • 2708-4096-bit (512 x 8) EPROM
  • 2716-16384-bit (2048 x 8) Static EPROM
  • 2732-32,768-bit (4096 x 8) EPROM
  • 2758-8192-bit (1024 x 8) Static EPROM w/Single 5V

[edit] 3xxx Family

  • 3301-1024-bit (256 x 4) Static ROM
  • 3302-2048-bit (512 x 4) Static ROM
  • 3304-4096-bit (1024 x 4 or 512 x 8) Static ROM
  • 3322-2048-bit (512 x 4) Static ROM
  • 3324-4096-bit (1024 x 4 or 512 x 8) Static ROM
  • 3601-1024-bit (256 x 4) PROM
  • 3602-2048-bit (512 x 4) PROM
  • 3604-4096-bit (512 x 8) PROM
  • 3605-4096-bit (1024 x 4) PROM
  • 3608-8192-bit (1024 x 8) PROM
  • 3621-1024-bit (256 x 4) PROM
  • 3622-2048-bit (512 x 4) PROM
  • 3624-4096-bit (512 x 8) PROM
  • 3625-4096-bit (1024 x 4) PROM
  • 3628-8192-bit (1024 x 8) PROM
  • 3636-16,384-bit (2048 x 8) PROM

[edit] 7xxx Family

  • 7110-1,048,576-bit Bubble Memory
  • 7220-Bubble Memory Controller for Intel 7110 Bubble Memory
  • 7230-Current Pulse Generator for Intel 7110 Bubble Memory
  • 7242-Dual Formatter/Sense Amplifier for Intel 7110 Bubble
  • 7250-Coil Predriver (CPD) for Intel 7110 Bubble Memory
  • 7254-Driver Transistor for Intel 7110 Bubble Memory

[edit] The 16-bit processors: origin of x86

[edit] 8086

  • Introduced June 8, 1978
  • Clock speeds:
    • 5 MHz with 0.33 MIPS
    • 8 MHz with 0.66 MIPS
    • 10 MHz with 0.75 MIPS
  • The memory is divided into odd and even banks. It accesses both the banks simultaneuosly in order to read 16 bit of data in one clock cycle.
  • Bus Width 16 bits data, 20 bits address
  • Number of Transistors 29,000 at 3 µm
  • Addressable memory 1 megabyte
  • 10X the performance of 8080
  • Used in portable computing
  • Used segment registers to access more than 64 KB of data at once, bane of programmers' existence for years to come

[edit] 8088

  • Introduced June 1, 1979
  • Clock speeds:
    • 5 MHz with 0.33 MIPS
    • 8 MHz with 0.75 MIPS
  • Internal architecture 16 bits
  • External bus Width 8 bits data, 20 bits address
  • Number of Transistors 29,000 at 3 µm
  • Addressable memory 1 megabyte
  • Identical to 8086 except for its 8 bit external bus (hence an 8 instead of a 6 at the end)
  • Used in IBM PCs and PC clones


iAPX 432 (chronological entry)

[edit] 80186

  • Introduced 1982
  • Used mostly in embedded applications - controllers, point-of-sale systems, terminals, and the like
  • Included two timers, a DMA controller, and an interrupt controller on the chip in addition to the processor
  • Later renamed the iAPX 186

[edit] 80188

  • A version of the 80186 with an 8-bit external data bus
  • Later renamed the iAPX 188

[edit] 80286

  • Introduced February 1, 1982
  • Clock speeds:
    • 6 MHz with 0.9 MIPS
    • 8 MHz, 10 MHz with 1.5 MIPS
    • 12.5 MHz with 2.66 MIPS
    • 16 MHZ, 20MHz and 25MHz available.
  • Bus Width 16 bits
  • Included memory protection hardware to support multitasking operating systems with per-process address space
  • Number of Transistors 134,000 at 1.5 µm
  • Addressable memory 16 MB
  • Added protected-mode features to 8086 with essentially the same instruction set
  • 3-6X the performance of the 8086
  • Widely used in PC clones at the time
  • Can scan the Encyclopædia Britannica in 45 seconds

[edit] 32-bit processors: the non-x86 microprocessors

[edit] iAPX 432

  • Introduced January 1, 1981 as Intel's first 32-bit microprocessor
  • Object/capability architecture
  • Microcoded operating system primitives
  • One tebrabyte virtual address space
  • Hardware support for fault tolerance
  • Two-chip General Data Processor (GDP), consists of 43201 and 43202
  • 43203 Interface Processor (IP) interfaces to I/O subsystem
  • 43204 Bus Interface Unit (BIU) simplifies building multiprocessor systems
  • 43205 Memory Control Unit (MCU)
  • Architecture and execution unit internal data paths 32 bit
  • Clock speeds:
    • 5 MHz
    • 7 MHz
    • 8 MHz

[edit] i960 aka 80960

  • Introduced April 5, 1988
  • RISC-like 32-bit architecture
  • predominantly used in embedded systems
  • Evolved from the capability processor developed for the BiiN joint venture with Siemens
  • Many variants identified by two-letter suffixes.


80386SX (chronological entry)


80376 (chronological entry)

[edit] i860 aka 80860

[edit] XScale

  • Introduced August 23, 2000
  • 32-bit RISC microprocessor based on the ARM architecture
  • Many variants, such as the PXA2xx applications processors, IOP3xx I/O processors and IXP2xxx and IXP4xx network processors.

[edit] 32-bit processors: the 80386 range

[edit] 80386DX

  • Introduced October 17, 1985
  • Clock speeds:
    • 16 MHz with 5 to 6 MIPS
    • 20 MHz with 6 to 7 MIPS, introduced 16 February 1987
    • 25 MHz with 8.5 MIPS, introduced 4 April 1988
    • 33 MHz with 11.4 MIPS (9.4 SPECint92 on Compaq/i 16K L2), introduced 10 April 1989
  • Bus Width 32 bits
  • Number of Transistors 275,000 at 1 µm
  • Addressable memory 4 GB
  • Virtual memory 64 TB
  • First x86 chip to handle 32-bit data sets
  • Reworked and expanded memory protection support including paged virtual memory and virtual-86 mode, features required by Windows 95 and OS/2 Warp
  • Used in Desktop computing
  • Can address enough memory to manage an eight-page history of every person on earth
  • Can scan the Encyclopædia Britannica in 12.5 seconds


80960 (i960) (chronological entry)

[edit] 80386SX

  • Introduced June 16, 1988
  • Clock speeds:
  • Internal architecture 32 bits
  • External data bus width 16 bits
  • External address bus width 24 bits
  • Number of Transistors 275,000 at 1 µm
  • Addressable memory 16 MB
  • Virtual memory 1 TB
  • Narrower buses enable low-cost 32-bit processing
  • Used in entry-level desktop and portable computing

[edit] 80376

  • Introduced January 16, 1989; Discontinued June 15, 2001
  • Variant of 386 intended for embedded systems
  • No "real mode", starts up directly in "protected mode"
  • Replaced by much more successful 80386EX from 1994


80860 (i860) (chronological entry)


80486DX (chronological entry)

[edit] 80386SL

  • Introduced October 15, 1990
  • Clock speeds:
  • Internal architecture 32 bits
  • External bus width 16 bits
  • Number of Transistors 855,000 at 1 µm
  • Addressable memory 4 GB
  • Virtual memory 1 TB
  • First chip specifically made for portable computers because of low power consumption of chip
  • Highly integrated, includes cache, bus, and memory controllers


80486SX/DX2/SL, Pentium, 80486DX4 (chronological entries)

[edit] 80386EX

  • Introduced August 1994
  • Variant of 80386SX intended for embedded systems
  • Static core, i.e. may run as slowly (and thus, power efficiently) as desired, down to full halt
  • On-chip peripherals:
    • Clock and power mgmt
    • Timers/counters
    • Watchdog timer
    • Serial I/O units (sync and async) and parallel I/O
    • DMA
    • RAM refresh
    • JTAG test logic
  • Significantly more successful than the 80376
  • Used aboard several orbiting satellites and microsatellites
  • Used in NASA's FlightLinux project

[edit] 32-bit processors: the 80486 range

[edit] 80486DX

  • Introduced April 10, 1989
  • Clock speeds:
    • 25 MHz with 20 MIPS (16.8 SPECint92, 7.40 SPECfp92)
    • 33 MHz with 27 MIPS (22.4 SPECint92 on Micronics M4P 128 KB L2), introduced 7 May 1990
    • 50 MHz with 41 MIPS (33.4 SPECint92, 14.5 SPECfp92 on Compaq/50L 256 KB L2), introduced 24 June 1991
  • Bus Width 32 bits
  • Number of Transistors 1.2 million at 1 µm; the 50 MHz was at 0.8 µm
  • Addressable memory 4 GB
  • Virtual memory 1 TB
  • Level 1 cache of 8 KB on chip
  • Math coprocessor on chip
  • 50X performance of the 8088
  • Used in Desktop computing and servers
  • Family 4 model 3


80386SL (chronological entry)

[edit] 80486SX

  • Introduced April 22, 1991
  • Clock speeds:
  • Bus Width 32 bits
  • Number of Transistors 1.185 million at 1 µm and 900,000 at 0.8 µm
  • Addressable memory 4 GB
  • Virtual memory 1 TB
  • Identical in design to 486DX but without math coprocessor
 the first version was 80486DX with disabled mathco in chip and different pins configuration,
if user need math co capabilities, we must add 487SX which was actually an 486DX with
different pins configuration to prevent user install an 486DX instead of 487SX, so
with these configuration 486SX+487SX we had 2 identical CPU with with only 1 turned on)

[edit] 80486DX2

  • Introduced March 3, 1992
  • Clock speeds:
    • 20 MHz
    • 40 MHz
    • 50 MHz
    • 66 MHz
    • 100 MHz

[edit] 80486SL

  • Introduced November 9, 1992
  • Clock speeds:
    • 20 MHz with 15.4MIPS
    • 25 MHz with 19 MIPS
    • 33 MHz with 25 MIPS
  • Bus Width 32 bits
  • Number of Transistors 1.4 million at 0.8 µm
  • Addressable memory 4 GB
  • Virtual memory 1 TB
  • Used in notebook computers
  • Family 4 model 3


Pentium (chronological entry)

[edit] 80486DX4

  • Introduced March 7, 1994
  • Clock speeds:
    • 75 MHz with 53 MIPS (41.3 SPECint92, 20.1 SPECfp92 on Micronics M4P 256 KB L2)
    • 100 MHz with 70.7 MIPS (54.59 SPECint92, 26.91 SPECfp92 on Micronics M4P 256 KB L2)
  • Number of Transistors 1.6 million at 0.6 µm
  • Bus width 32 bits
  • Addressable memory 4 GB
  • Virtual memory 64 TB
  • Pin count 168 PGA Package, 208 sq ftP Package
  • Die size 345 mm²
  • Used in high performance entry-level desktops and value notebooks
  • Family 4 model 8

[edit] 32-bit processors: the Pentium ("I")

[edit] Pentium ("Classic")

  • Bus width 64 bits
  • System bus speed 60 or 66 MHz
  • Address bus 32 bits
  • Addressable Memory 4 GB
  • Virtual Memory 64 TB
  • Superscalar architecture brought 5X the performance of the 33 MHz 486DX processor
  • Runs on 5 volts
  • Used in desktops
  • 16 KB of L1 cache
  • P5 - 0.8 µm process technology
    • Introduced March 22, 1993
    • Number of transistors 3.1 million
    • Socket 4 273 pin PGA processor package
    • Package dimensions 2.16" x 2.16"
    • Family 5 model 1
    • Variants
      • 60 MHz with 100 MIPS (70.4 SPECint92, 55.1 SPECfp92 on Xpress 256 KB L2)
      • 66 MHz with 112 MIPS (77.9 SPECint92, 63.6 SPECfp92 on Xpress 256 KB L2)
  • P54 - 0.6 µm process technology
  • P54C - 0.35 µm process technology
    • Number of transistors 3.3 million
    • 90 mm² die size
    • Family 5 model 2
    • Variants


80486DX4 (chronological entry)


80386EX (Intel386 EX) (chronological entry)


Pentium Pro (chronological entry)

[edit] Pentium MMX

[edit] 32-bit processors: P6/Pentium M microarchitecture

[edit] Pentium Pro

  • Introduced November 1, 1995
  • Precursor to Pentium II and III
  • Primarily used in server systems
  • Socket 8 processor package (387 pins) (Dual SPGA)
  • Number of transistors 5.5 million
  • Family 6 model 1
  • 0.6 µm process technology
    • 16 KB L1 cache
    • 256 KB integrated L2 cache
    • 60 MHz system bus speed
    • Variants
      • 150 MHz
  • 0.35 µm process technology, or 0.35 µm CPU with 0.6 µm L2 cache
    • Number of transistors 5.5 million
    • 512 KB or 256 KB integrated L2 cache
    • 60 or 66 MHz system bus speed
    • Variants
      • 166 MHz (66 MHz bus speed, 512 KB 0.35 µm cache) Introduced November 1, 1995
      • 180 MHz (60 MHz bus speed, 256 KB 0.6 µm cache) Introduced November 1, 1995
      • 200 MHz (66 MHz bus speed, 256 KB 0.6 µm cache) Introduced November 1, 1995
      • 200 MHz (66 MHz bus speed, 512 KB 0.35 µm cache) Introduced November 1, 1995
      • 200 MHz (66 MHz bus speed, 1 MB 0.35 µm cache) Introduced August 18, 1997

[edit] Pentium II

[edit] Celeron (Pentium II-based)


Pentium II Xeon (chronological entry)

[edit] Pentium III

[edit] Pentium II and III Xeon

  • PII Xeon
  • PIII Xeon
    • Introduced October 25, 1999
    • Number of transistors: 9.5 million at 0.25 µm or 28 million at 0.18 µm)
    • L2 cache is 256 KB, 1 MB, or 2 MB Advanced Transfer Cache (Integrated)
    • Processor Package Style is Single Edge Contact Cartridge (S.E.C.C.2) or SC330
    • System Bus Speed 133 MHz (256 KB L2 cache) or 100 MHz (1 - 2 MB L2 cache)
    • System Bus Width 64 bit
    • Addressable memory 64 GB
    • Used in two-way servers and workstations (256 KB L2) or 4- and 8-way servers (1 - 2 MB L2)
    • Family 6 model 10
    • Variants

[edit] Celeron (Pentium III Coppermine-based)


XScale (chronological entry)


Pentium 4 (not 4EE, 4E, 4F), Itanium, P4-based Xeon, Itanium 2 (chronological entries)

  • Introduced April 2000 – July 2002
  • See main entries

[edit] Celeron (Pentium III Tualatin-based)

  • Tualatin Celeron - 0.13 µm process technology
    • 32 KB L1 cache
    • 256 KB Advanced Transfer L2 cache
    • 100 MHz system bus speed
    • Family 6 model 11
    • Variants
      • 1.0 GHz
      • 1.1 GHz
      • 1.2 GHz
      • 1.3 GHz
      • 1.4 GHz

[edit] Pentium M

  • Banias 0.13 µm process technology
    • Introduced March 2003
    • 64 KB L1 cache
    • 1 MB L2 cache (integrated)
    • Based on Pentium III core, with SSE2 SIMD instructions and deeper pipeline
    • Number of transistors 77 million
    • Micro-FCPGA, Micro-FCBGA processor package
    • Heart of the Intel mobile "Centrino" system
    • 400 MHz Netburst-style system bus
    • Family 6 model 9
    • Variants
      • 900 MHz (Ultra low voltage)
      • 1.0 GHz (Ultra low voltage)
      • 1.1 GHz (Low voltage)
      • 1.2 GHz (Low voltage)
      • 1.3 GHz
      • 1.4 GHz
      • 1.5 GHz
      • 1.6 GHz
      • 1.7 GHz
  • Dothan 0.09 µm (90 nm) process technology
    • Introduced May 2004
    • 2 MB L2 cache
    • Revised data prefetch unit
    • 400 MHz Netburst-style system bus
    • 21W TDP
    • Variants
      • 1.00 GHz (Pentium M 723) (Ultra low voltage, 5W TDP)
      • 1.10 GHz (Pentium M 733) (Ultra low voltage, 5W TDP)
      • 1.20 GHz (Pentium M 753) (Ultra low voltage, 5W TDP)
      • 1.30 GHz (Pentium M 718) (Low voltage, 10W TDP)
      • 1.40 GHz (Pentium M 738) (Low voltage, 10W TDP)
      • 1.50 GHz (Pentium M 758) (Low voltage, 10W TDP)
      • 1.60 GHz (Pentium M 778) (Low voltage, 10W TDP)
      • 1.40 GHz (Pentium M 710)
      • 1.50 GHz (Pentium M 715)
      • 1.60 GHz (Pentium M 725)
      • 1.70 GHz (Pentium M 735)
      • 1.80 GHz (Pentium M 745)
      • 2.00 GHz (Pentium M 755)
      • 2.10 GHz (Pentium M 765)
  • Dothan 533 0.09 µm (90 nm) process technology
    • Introduced Q1 2005
    • Same as Dothan except with a 533 MHz NetBurst-style system bus and 27W TDP
    • Variants
      • 1.60 GHz (Pentium M 730)
      • 1.73 GHz (Pentium M 740)
      • 1.86 GHz (Pentium M 750)
      • 2.00 GHz (Pentium M 760)
      • 2.13 GHz (Pentium M 770)
      • 2.26 GHz (Pentium M 780)
  • Stealey 0.09 µm (90 nm) process technology
    • Introduced Q2 2007
    • 512 KB L2, 3-6W TDP
    • Variants
      • 600 MHz (A100)
      • 800 MHz (A110)

[edit] Celeron M

  • Banias-512 0.13 µm process technology
    • Introduced March 2003
    • 64 KB L1 cache
    • 512 KB L2 cache (integrated)
    • SSE2 SIMD instructions
    • No SpeedStep technology, is not part of the 'Centrino' package
    • Family 6 model 9
    • Variants
      • 310 - 1.20 GHz
      • 320 - 1.30 GHz
      • 330 - 1.40 GHz
      • 340 - 1.50 GHz
  • Dothan-1024 90 nm process technology
    • 64 KB L1 cache
    • 1 MB L2 cache (integrated)
    • SSE2 SIMD instructions
    • No SpeedStep technology, is not part of the 'Centrino' package
    • Variants
      • 350 - 1.30 GHz
      • 350J - 1.30 GHz, with Execute Disable bit
      • 360 - 1.40 GHz
      • 360J - 1.40 GHz, with Execute Disable bit
      • 370 - 1.50 GHz, with Execute Disable bit
        • Family 6, Model 13, Stepping 8[1]
      • 380 - 1.60 GHz, with Execute Disable bit
      • 390 - 1.70 GHz, with Execute Disable bit
  • Yonah-1024 65 nm process technology
    • 64 KB L1 cache
    • 1 MB L2 cache (integrated)
    • SSE3 SIMD instructions, 533MHz front-side bus, execute-disable bit
    • No SpeedStep technology, is not part of the 'Centrino' package
    • Variants
      • 410 - 1.46 GHz
      • 420 - 1.60 GHz,
      • 423 - 1.06 GHz (ultra low voltage)
      • 430 - 1.73 GHz
      • 440 - 1.86 GHz
      • 443 - 1.20 GHz (ultra low voltage)
      • 450 - 2.00 GHz
  • Merom-1024 65 nm process technology
    • 64 KB L1 cache
    • 1 MB L2 cache (integrated)
    • SSE3 SIMD instructions, 533MHz front-side bus, execute-disable bit, 64-bit
    • No SpeedStep technology, is not part of the 'Centrino' package
    • Variants
      • 520 - 1.60 GHz

[edit] Intel Core

  • Yonah 0.065 µm (65 nm) process technology
    • Introduced January 2006
    • 667 MHz frontside bus
    • 2 MB (Shared on Duo) L2 cache
    • SSE3 SIMD instructions
    • Variants:
      • Intel Core Duo T2700 2.33 GHz
      • Intel Core Duo T2600 2.16 GHz
      • Intel Core Duo T2500 2.00 GHz
      • Intel Core Duo T2400 1.83 GHz
      • Intel Core Duo T2300 1.66 GHz
      • Intel Core Duo T2050 1.60 GHz
      • Intel Core Solo T1350 1.86 GHz
      • Intel Core Solo T1300 1.66 GHz
      • Intel Core Solo T1200 1.50 GHz [2]

[edit] Dual-Core Xeon LV

  • Sossaman 0.065 µm (65 nm) process technology
    • Introduced March 2006
    • Based on Yonah core, with SSE3 SIMD instructions
    • 667 MHz frontside bus
    • 2 MB Shared L2 cache
    • Variants
      • 2.0 GHz

[edit] Intel Pentium Dual-Core

  • 0.065 µm (65 nm) process technology
    • 533 MHz frontside bus
    • 1 MB Shared L2 cache
    • SSE3 SIMD instructions
    • Variants:
      • Pentium dual-core T2080 1.73 GHz
      • Pentium dual-core T2060 1.60 GHz

[edit] 32-bit processors: NetBurst microarchitecture

[edit] Pentium 4

  • 0.18 µm process technology (1.40 and 1.50 GHz)
    • Introduced November 20, 2000
    • L2 cache was 256 KB Advanced Transfer Cache (Integrated)
    • Processor Package Style was PGA423, PGA478
    • System Bus Speed 400 MHz
    • SSE2 SIMD Extensions
    • Number of Transistors 42 million
    • Used in desktops and entry-level workstations
  • 0.18 µm process technology (1.7 GHz)
    • Introduced April 23, 2001
    • See the 1.4 and 1.5 chips for details
  • 0.18 µm process technology (1.6 and 1.8 GHz)
    • Introduced July 2, 2001
    • See 1.4 and 1.5 chips for details
    • Core Voltage is 1.15 volts in Maximum Performance Mode; 1.05 volts in Battery Optimized Mode
    • Power <1>
    • Used in full-size and then light mobile PCs
  • 0.18 µm process technology Willamette (1.9 and 2.0 GHz)
  • Family 15 model 1
  • Pentium 4 (2 GHz, 2.20 GHz)
  • Pentium 4 (2.4 GHz)
  • 0.13 µm process technology Northwood A (1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6 GHz)
    • Improved branch prediction and other microcodes tweaks
    • 512 KB integrated L2 cache
    • Number of transistors 55 million
    • 400 MHz system bus.
  • Family 15 model 2
  • 0.13 µm process technology Northwood B (2.26, 2.4, 2.53, 2.66, 2.8, 3.06 GHz)
  • 0.13 µm process technology Northwood C (2.4, 2.6, 2.8, 3.0, 3.2, 3.4 GHz)
    • 800 MHz system bus (all versions include Hyper Threading)
    • 6500 to 10000 MIPS


Itanium (chronological entry)

[edit] Xeon

  • Official designation now Xeon, i.e. not "Pentium 4 Xeon"
  • Xeon 1.4, 1.5, 1.7 GHz
    • Introduced May 21, 2001
    • L2 cache was 256 KB Advanced Transfer Cache (Integrated)
    • Processor Package Style was Organic Lan Grid Array 603 (OLGA 603)
    • System Bus Speed 400 MHz
    • SSE2 SIMD Extensions
    • Used in high-performance and mid-range dual processor enabled workstations
  • Xeon 2.0 GHz and up to 3.6 GHz


Itanium 2 (chronological entry)

[edit] Mobile Pentium 4-M

  • 0.13 µm process technology
  • 55 million transistors
  • cache L2 512 KB
  • BUS a 400 MHz
  • Supports up to 1 GB of DDR 266 MHz Memory
  • Supports ACPI 2.0 and APM 1.2 System Power Management
  • 1.3 V - 1.2 V (SpeedStep)
  • Power: 1.2 GHz 20.8 W, 1.6 GHz 30 W, 2.6 GHz 35 W
  • Sleep Power 5 W (1.2 V)
  • Deeper Sleep Power = 2.9 W (1.0 V)
    • 1.40 GHz - 23 April 2002
    • 1.50 GHz - 23 April 2002
    • 1.60 GHz - 4 March 2002
    • 1.70 GHz - 4 March 2002
    • 1.80 GHz - 23 April 2002
    • 1.90 GHz - 24 June 2002
    • 2.00 GHz - 24 June 2002
    • 2.20 GHz - 16 September 2002
    • 2.40 GHz - 14 January 2003
    • 2.40 GHz - 14 January 2003
    • 2.50 GHz - 16 April 2003
    • 2.60 GHz - 11 June 2003

[edit] Pentium 4 EE

  • Introduced September 2003
  • EE = "Extreme Edition"
  • Built from the Xeon's "Gallatin" core, but with 2 MB cache

[edit] Pentium 4E

  • Introduced February 2004
  • built on 0.09 µm (90 nm) process technology Prescott (2.4A, 2.8, 2.8A, 3.0, 3.2, 3.4, 3.6, 3.8) 1 MB L2 cache
  • 533 MHz system bus (2.4A and 2.8A only)
  • Number of Transistors 125 million on 1 MB Models
  • Number of Transistors 169 million on 2 MB Models
  • 800 MHz system bus (all other models)
  • Hyper-Threading support is only available on CPUs using the 800 MHz system bus.
  • The processor's integer instruction pipeline has been increased from 20 stages to 31 stages, which theoretically allows for even greater clock speeds.
  • 7500 to 11000 MIPS
  • LGA-775 versions are in the 5xx series (32-bit) and 5x1 series (with Intel 64)
  • The 6xx series has 2 MB L2 cache and Intel 64

[edit] Pentium 4F

  • Introduced Spring 2004
  • same core as 4E, "Prescott"
  • 3.2–3.6 GHz
  • starting with the D0 stepping of this processor, Intel 64 64-bit extensions has also been incorporated

[edit] 64-bit processors: IA-64

  • New instruction set, not at all related to x86.
  • Before the feature was eliminated (Montecito, July 2006) IA-64 processors supported 32-bit x86 in hardware, but slowly.

[edit] Itanium

[edit] Itanium 2

  • Released July 2002
  • 900 MHz and 1 GHz


Pentium M (chronological entry)


Pentium 4EE, 4E (chronological entries)

  • Introduced September 2003, February 2004, respectively
  • See main entries

[edit] 64-bit processors: Intel64 - NetBurst

  • Intel® Extended Memory 64 Technology
  • Mostly compatible with AMD's AMD64 architecture
  • Introduced Spring 2004, with the Pentium 4F (D0 and later P4 steppings)

[edit] Pentium 4F, D0 and later steppings

  • Starting with the D0 stepping of this processor, x86-64 extensions are supported

[edit] Pentium D

  • Smithfield - 90 nm process technology (2.8–3.4 GHz)
    • Introduced May 26, 2005
    • 2.8–3.4 GHz (model numbers 820-840)
    • Number of Transistors 230 million
    • 1 MB x 2 (non-shared, 2 MB total) L2 cache
    • Cache coherency between cores requires communication over the FSB
    • Performance increase of 60% over similarly clocked Prescott
    • 2.66 GHz (533 MHz FSB) Pentium D 805 introduced December 2005
  • Presler - 65 nm process technology (2.8–3.6 GHz)
    • Introduced January 16, 2006
    • 2.8–3.6 GHz (model numbers 920-960)
    • Number of Transistors 376 million
    • 2 MB x 2 (non-shared, 4 MB total) L2 cache

[edit] Pentium Extreme Edition

  • Smithfield - 90 nm process technology (3.2 GHz)
    • Variants
      • Pentium 840 EE - 3.20 GHz (2 x 1 MB L2)
  • Presler - 65 nm process technology (3.46, 3.73)
    • 2 MB x 2 (non-shared, 4 MB total) L2 cache
    • Variants
      • Pentium 955 EE - 3.46 GHz
      • Pentium 965 EE - 3.73 GHz

[edit] Xeon

  • Nocona
  • Irwindale
  • Cranford
  • Potomac
    • Introduced April 2005
    • Cranford with 8 MB of L3 cache
  • Paxville DP (2.8 GHz)
    • Introduced October 10, 2005
    • Dual-core version of Irwindale, with 4 MB of L2 Cache (2 MB per core)
    • 2.8 GHz
    • 800 MT/s front side bus
  • Paxville MP - 90 nm process (2.67 - 3.0 GHz)
    • Introduced November 1, 2005
    • Dual-Core Xeon 7000 series
    • MP-capable version of Paxville DP
    • 2 MB of L2 Cache (1 MB per core) or 4 MB of L2 (2 MB per core)
    • 667 MT/s FSB or 800 MT/s FSB
  • Dempsey - 65 nm process (2.67 - 3.73 GHz)
    • Introduced May 23, 2006
    • Dual-Core Xeon 5000 series
    • MP version of Presler
    • 667 MT/s or 1066 MT/s FSB
    • 4 MB of L2 Cache (2 MB per core)
    • Socket J, also known as LGA 771.
  • Tulsa - 65 nm process (2.5 - 3.4 GHz)
    • Introduced August 29, 2006
    • Dual-Core Xeon 7100-series
    • Improved version of Paxville MP
    • 667 MT/s or 800 MT/s FSB

[edit] 64-bit processors: Intel64 - Intel Core microarchitecture

[edit] Xeon

  • Woodcrest - 65 nm process technology
    • Server and Workstation CPU (SMP support for dual CPU system)
    • Introduced June 26, 2006
    • Dual-Core
    • Intel Virtualization Technology, multiple OS support
    • EIST (Enhanced Intel SpeedStep Technology) in 5140, 5148LV, 5150, 5160
    • Execute Disable Bit
    • LaGrande Technology, enhanced security hardware extensions
    • SSSE3 SIMD instructions
    • iAMT2 (Intel Active Management Technology), remotely manage computers
    • Variants
      • Xeon 5160 - 3.00 GHz (4 MB L2, 1333 MHz FSB, 80 W)
      • Xeon 5150 - 2.66 GHz (4 MB L2, 1333 MHz FSB, 65 W)
      • Xeon 5140 - 2.33 GHz (4 MB L2, 1333 MHz FSB, 65 W)
      • Xeon 5130 - 2.00 GHz (4 MB L2, 1333 MHz FSB, 65 W)
      • Xeon 5120 - 1.86 GHz (4 MB L2, 1066 MHz FSB, 65 W)
      • Xeon 5110 - 1.60 GHz (4 MB L2, 1066 MHz FSB, 65 W)
      • Xeon 5148LV - 2.33 GHz (4 MB L2, 1333 MHz FSB, 40 W) -- Low Voltage Edition


  • Clovertown - 65 nm process technology
    • Server and Workstation CPU (SMP support for dual CPU system)
    • Introduced Dec 13th 2006
    • Quad-Core
    • Intel Virtualization Technology, multiple OS support
    • EIST (Enhanced Intel SpeedStep Technology) in 5140, 5148LV, 5150, 5160
    • Execute Disable Bit
    • LaGrande Technology, enhanced security hardware extensions
    • SSSE3 SIMD instructions
    • iAMT2 (Intel Active Management Technology), remotely manage computers
    • Variants
      • Xeon X5355 - 2.66 GHz (2x4 MB L2, 1333 MHz FSB, 105 W)
      • Xeon E5345 - 2.33 GHz (2x4 MB L2, 1333 MHz FSB, 80 W)
      • Xeon E5335 - 2.00 GHz (2x4 MB L2, 1333 MHz FSB, 80 W)
      • Xeon E5320 - 1.86 GHz (2x4 MB L2, 1066 MHz FSB, 65 W)
      • Xeon E5310 - 1.60 GHz (2x4 MB L2, 1066 MHz FSB, 65 W)
      • Xeon L5320 - 1.86 GHz (2x4 MB L2, 1066 MHz FSB, 40 W)-- Low Voltage Edition

[edit] Intel Core 2

  • Conroe - 65 nm process technology
    • Desktop CPU (SMP support restricted to 2 CPUs)
    • Two CPUs in one package
    • Introduced July 27, 2006
    • SSSE3 SIMD instructions
    • Number of Transistors 291 Million on 4 MB Models
    • Number of Transistors 167 Million on 2 MB Models
    • Intel Virtualization Technology, multiple OS support
    • LaGrande Technology, enhanced security hardware extensions
    • Execute Disable Bit
    • EIST (Enhanced Intel SpeedStep Technology)
    • iAMT2 (Intel Active Management Technology), remotely manage computers
    • LGA775
    • Variants
      • Core 2 Duo E6850 - 3.00 Ghz (4 MB L2, 1333 MHz FSB)
      • Core 2 Duo E6800 - 2.93 Ghz (4 MB L2, 1066 MHz FSB)
      • Core 2 Duo E6750 - 2.67 GHz (4 MB L2, 1333 MHz FSB)
      • Core 2 Duo E6700 - 2.67 GHz (4 MB L2, 1066 MHz FSB)
      • Core 2 Duo E6650 - 2.33 GHz (4 MB L2, 1333 MHz FSB)
      • Core 2 Duo E6600 - 2.40 GHz (4 MB L2, 1066 MHz FSB)
      • Core 2 Duo E6420 - 2.13 GHz (4 MB L2, 1066 MHz FSB)
      • Core 2 Duo E6400 - 2.13 GHz (2 MB L2, 1066 MHz FSB)
      • Core 2 Duo E6320 - 1.86 GHz (4 MB L2, 1066 MHz FSB)
      • Core 2 Duo E6300 - 1.86 GHz (2 MB L2, 1066 MHz FSB)
      • Core 2 Duo E4500 - 2.20 GHz (2 MB L2, 800 MHz FSB, no VT)
      • Core 2 Duo E4400 - 2.00 GHz (2 MB L2, 800 MHz FSB, no VT)
      • Core 2 Duo E4300 - 1.80 GHz (2 MB L2, 800 MHz FSB, no VT)


  • Conroe XE - 65 nm process technology
    • Desktop Extreme Edition CPU (SMP support restricted to 2 CPUs)
    • Introduced July 27, 2006
    • same features as Conroe
    • LGA775
    • Variants
      • Core 2 Extreme X6800 - 2.93 GHz (4 MB L2, 1066 MHz FSB)


  • Merom - 65 nm process technology
    • Mobile CPU (SMP support restricted to 2 CPUs)
    • Introduced July 27, 2006
    • same features as Conroe
    • Socket M
    • Variants
      • Core 2 Duo T7700 - 2.40 GHz (4 MB L2, 800 MHz FSB) (Santa Rosa platform)
      • Core 2 Duo T7600 - 2.33 GHz (4 MB L2, 667 MHz FSB)
      • Core 2 Duo T7500 - 2.20 GHz (4 MB L2, 800 MHz FSB)
      • Core 2 Duo T7400 - 2.16 GHz (4 MB L2, 667 MHz FSB)
      • Core 2 Duo T7300 - 2.00 GHz (4 MB L2, 800 MHz FSB)
      • Core 2 Duo T7200 - 2.00 GHz (4 MB L2, 667 MHz FSB)
      • Core 2 Duo T7100 - 1.80 GHz (2 MB L2, 800 Mhz FSB)
      • Core 2 Duo T5600 - 1.83 GHz (2 MB L2, 667 MHz FSB)
      • Core 2 Duo T5500 - 1.66 GHz (2 MB L2, 667 MHz FSB, no VT)
      • Core 2 Duo T5200 - 1.60 GHz (2 MB L2, 533 MHz FSB)
      • Core 2 Duo L7500 - 1.60 GHz (4 MB L2, 800 MHz FSB) (Low Voltage)
      • Core 2 Duo L7400 - 1.50 GHz (4 MB L2, 667 MHz FSB) (Low Voltage)
      • Core 2 Duo L7300 - 1.40 GHz (4 MB L2, 800 MHz FSB) (Low Voltage)
      • Core 2 Duo L7200 - 1.33 GHz (4 MB L2, 667 MHz FSB) (Low Voltage)
      • Core 2 Duo U7600 - 1.20 GHz (2 MB L2, 533 MHz FSB) (Ultra mobile)
      • Core 2 Duo U7500 - 1.06 GHz (2 MB L2, 533 MHz FSB) (Ultra mobile)


  • Kentsfield - 65 nm process technology
    • Desktop CPU Quad Core (SMP support restricted to 4 CPUs)
    • Introduced December 13, 2006
    • same features as Conroe but with 4 CPU Cores
    • Socket 775
    • Variants
      • Core 2 Extreme QX6800 - 2.93 GHz (2x4 MB L2, 1066 MHz FSB) (Apr 9th 07)
      • Core 2 Extreme QX6700 - 2.66 GHz (2x4 MB L2, 1066 MHz FSB) (Nov 14th 06)
      • Core 2 Quad Q6600 - 2.40 GHz (2x4 MB L2, 1066 MHz FSB) (Jan 7th 07)

[edit] Detailed x86 architecture microprocessor lists

[edit] Intel 805xx product codes

Intel discontinued the use of part numbers such as 80486 in the marketing of mainstream x86-architecture microprocessors with the introduction of the Pentium brand in 1993. However, numerical codes, in the 805xx range, continued to be assigned to these processors for internal and part numbering uses. The following is a list of such product codes in numerical order:

Product code Marketing name(s) Codename(s)
80500 Pentium P5 (A-step)
80501 Pentium P5
80502 Pentium P54C, P54CS
80503 Pentium MMX P55C, Tillamook
80521 Pentium Pro P6
80522 Pentium II Klamath
80523 Pentium II, Celeron, Pentium II Xeon Deschutes, Covington, Drake
80524 Pentium II, Celeron Dixon, Mendocino
80525 Pentium III, Pentium III Xeon Katmai, Tanner
80526 Pentium III, Celeron, Pentium III Xeon Coppermine, Cascades
80528 Pentium 4, Xeon Willamette (Socket 423), Foster
80530 Pentium III, Celeron Tualatin
80531 Pentium 4, Celeron Willamette (Socket 478)
80532 Pentium 4, Celeron, Xeon Northwood, Prestonia, Gallatin
80535 Pentium M, Celeron M Banias
80536 Pentium M, Celeron M Dothan
80537 Core 2 Duo T-series Merom
80538 Core Solo, Celeron M 4xx Yonah
80539 Core Duo Yonah
80541 Itanium Merced
80546 Pentium 4, Celeron D, Xeon Prescott (Socket 478), Nocona, Irwindale, Cranford, Potomac
80547 Pentium 4, Celeron D Prescott (LGA775)
80550 Dual-Core Xeon 71xx Tulsa
80551 Pentium D, Pentium EE, Dual-Core Xeon Smithfield, Paxville DP
80552 Pentium 4, Celeron D Cedar Mill
80553 Pentium D, Pentium EE Presler
80555 Dual-Core Xeon 50xx Dempsey
80556 Dual-Core Xeon 51xx Woodcrest
80557 Core 2 Duo E-series, Dual-Core Xeon 30xx Conroe
80560 Dual-Core Xeon 70xx Paxville MP
80562 Core 2 Quad, Core 2 Extreme QX-series, Quad-Core Xeon 32xx Kentsfield
80563 Quad-Core Xeon 53xx Clovertown